Implementação em FPGA de Detector de Novidades Adaptativo Baseado na DTW para Sinais de Qualidade de Energia Utilizando Processadores Soft-Core

Authors

  • Igor Daher Cabral Faculdade de Engenharia Elétrica, Universidade Federal de Juiz de Fora, MG
  • Matheus da Silva Rodrigues Faculdade de Engenharia Elétrica, Universidade Federal de Juiz de Fora, MG
  • Eder Barboza Kapisch Faculdade de Engenharia Elétrica, Universidade Federal de Juiz de Fora, MG
  • Victor Mendes Ribeiro Faculdade de Engenharia Elétrica, Universidade Federal de Juiz de Fora, MG
  • Leandro Rodrigues Manso Silva Faculdade de Engenharia Elétrica, Universidade Federal de Juiz de Fora, MG
  • Carlos Augusto Duque Faculdade de Engenharia Elétrica, Universidade Federal de Juiz de Fora, MG

DOI:

https://doi.org/10.20906/CBA2024/4708

Keywords:

Novelty Detection, FPGA, DTW, Power Quality, Soft-Core Processor

Abstract

This work describes a Field Programmable Gate Array (FPGA) implementation of a Novelty Detector (ND) based on a dynamic similarity metric, Dynamic Time Warping (DTW), capable of comparing segments of different sizes adaptable to Power Quality (PQ) disturbances present in the voltage and current signals from Electrical Power Systems (EPS). Adaptability can be a useful characteristic for unknown events that may arise in the new context of Smart Grids (SG) in EPS. Although, in general, DTW is of greater complexity than ND techniques based on fixed-size segments, hardware and software optimizations and adaptations were made in order to achieve real-time operation due to the use of soft-core processors. The functional simulation results show that the developed hardware is capable of calculating the DTW and detecting the novel adaptive segments in signals sampled at a rate of 3840 Hz.

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Published

2024-10-18

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Section

Articles